Computer Science @ University of St Andrews

University of St Andrews crest

Dr Susmit Sarkar

Dr Susmit Sarkar

Position: Lecturer

Research profile

Email (@st-andrews.ac.uk): ss265

Office: JC0.17 - Jack Cole Building, North Haugh

Phone: +44 (0)1334 46 1631

Home page: https://ss265.host.cs.st-andrews.ac.uk

Recent Publications

Verification of a lazy cache coherence protocol against a weak memory model

Banks, C, Elver, M, Hoffmann, R, Sarkar, S, Jackson, P & Nagarajan, V 2017, Verification of a lazy cache coherence protocol against a weak memory model. in Proceedings of the 17th Conference on Formal Methods in Computer-Aided Design (FMCAD). ACM, Formal Methods in Computer-Aided Design (FMCAD), Vienna, Austria, 2-6 October.

Automatically deriving cost models for structured parallel processes using hylomorphisms

Mixed-size Concurrency: ARM, POWER, C/C++11, and SC

Flur, S, Sarkar, S, Pulte, C, Nienhuis, K, Maranget, L, Gray, K, Sezgin, A, Batty, M & Sewell, P 2017, Mixed-size Concurrency: ARM, POWER, C/C++11, and SC. in Proceedings of the 44th annual ACM-SIGPLAN Symposium on Principles of programming languages. ACM, pp. 429-442, POPL'17 44th ACM SIGPLAN Symposium on Principles of Programming Languages, Paris, France, 15-21 January. DOI: 10.1145/3009837.3009839

Farms, pipes, streams and reforestation: reasoning about structured parallel processes using types and hylomorphisms

Castro, D, Hammond, K & Sarkar, S 2016, Farms, pipes, streams and reforestation: reasoning about structured parallel processes using types and hylomorphisms. in Proceedings of the 21st ACM SIGPLAN International Conference on Functional Programming. ACM, New York, pp. 4-17, ICFP 2016 - 21st ACM SIGPLAN International Conference on Functional Programming, Nara, Japan, 18-24 September. DOI: 10.1145/2951913.2951920

Modelling the ARMv8 architecture, operationally: concurrency and ISA

Flur, S, Gray, K, Pulte, C, Sarkar, S, Maranget, L, Sezgin, A, Deacon, W & Sewell, P 2016, Modelling the ARMv8 architecture, operationally: concurrency and ISA. in Proceedings of the 43rd Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages. ACM, New York, pp. 608-621, POPL '16 The 43rd Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, St Petersburg, Florida, United States, 20-22 January. DOI: 10.1145/2837614.2837615

Fence placement for legacy Data-Race-Free programs via synchronization read detection

Timing properties and correctness for structured parallel programs on x86-64 multicores

Hammond, K, Brown, CM & Sarkar, S 2016, Timing properties and correctness for structured parallel programs on x86-64 multicores. in M van Eekelen & U Dal Lago (eds), Foundational and Practical Aspects of Resource Analysis: 4th International Workshop, FOPARA 2015, London, UK, April 11, 2015. Revised Selected Papers. Lecture Notes in Computer Science, vol. 9964, Springer, pp. 101-125, 4th International Workshop, Foundational and Practical Aspects of Resource Analysis (FOPARA 2015), London, United Kingdom, 11-11 April. DOI: 10.1007/978-3-319-46559-3_6

An integrated concurrency and core-ISA architectural envelope definition, and test oracle, for IBM POWER multiprocessors

Gray, K, Kerneis, G, Mulligan, D, Pulte, C, Sarkar, S & Sewell, P 2015, An integrated concurrency and core-ISA architectural envelope definition, and test oracle, for IBM POWER multiprocessors. in MICRO-48 Proceedings of the 48th International Symposium on Microarchitecture . ACM, New York, pp. 635-646, The 48th International Symposium on Microarchitecture, 2015 MICRO-48, Waikiki, Hawaii, United States, 5-9 December. DOI: 10.1145/2830772.2830775

Fence placement for legacy data-race-free programs via synchronization read detection

McPherson, A, Nagarajan, V, Sarkar, S & Cintra, M 2015, Fence placement for legacy data-race-free programs via synchronization read detection. in PPoPP 2015 Proceedings of the 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming. ACM, New York, pp. 249-250, 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, San Franciso, United States, 7-11 February. DOI: 10.1145/2688500.2688524

An Axiomatic Memory Model for POWER Multiprocessors

Mador-Haim, S, Maranget, L, Sarkar, S, Memarian, K, Alglave, J, Owens, S, Alur, R, Martin, M, Sewell, P & Williams, D 2012, An Axiomatic Memory Model for POWER Multiprocessors. in P Madhusudan & S Seshia (eds), Proceedings of the 24th International Conference on Computer Aided Verification. Lecture Notes in Computer Science, vol. 7358, Springer-Verlag, pp. 495. DOI: 10.1007/978-3-642-31424-7_36